? semiconductor components industries, llc, 2014 september, 2014 ? rev. 12 1 publication order number: MC74HCT74A/d MC74HCT74A dual d flip-flop with set and reset with lsttl compatible inputs high?performance silicon?gate cmos the MC74HCT74A is identical in pinout to the ls74. this device may be used as a level converter for interfacing ttl or nmos outputs to high speed cmos inputs. this device consists of two d flip?flops with individual set, reset, and clock inputs. information at a d?input is transferred to the corresponding q output on the next positive going edge of the clock input. both q and q outputs are available from each flip?flop. the set and reset inputs are asynchronous. features ? output drive capability: 10 lsttl loads ? ttl nmos compatible input levels ? outputs directly interface to cmos, nmos, and ttl ? operating voltage range: 4.5 to 5.5 v ? low input current: 1.0 a ? in compliance with the jedec standard no. 7.0 a requirements ? chip complexity: 136 fets or 34 equivalent gates ? these devices are pb?free, halogen free and are rohs compliant logic diagram reset 1 data 1 clock 1 set 1 reset 2 data 2 clock 2 set 2 1 2 3 4 13 12 11 10 5 6 9 8 q1 q1 q2 q2 pin 14 = v cc pin 7 = gnd design criteria value units internal gate count? 34 ea. internal gate propagation delay 1.5 ns internal gate power dissipation 5.0 w speed power product .0075 pj ?equivalent to a two?input nand gate. http://onsemi.com see detailed ordering and shipping information on page 3 o f this data sheet. ordering information pin assignment set 1 clock 1 data 1 reset 1 11 12 13 14 8 9 10 5 4 3 2 1 7 6 set 2 clock 2 data 2 reset 2 v cc q2 q2 gnd q1 q1 function table inputs outputs set reset clock data q q lh xx hl hl xx lh l l x x h* h* hh h hl hh l lh h h l x no change h h h x no change h h x no change *both outputs will remain high as long as set and reset are low, but the output states are unpredict - able if set and reset go high simultaneously. marking diagram a = assembly location wl = wafer lot y, yy = year ww = work week g = pb?free package soic?14 nb d suffix case 751a hct74ag awlyww 1 14
MC74HCT74A http://onsemi.com 2 maximum ratings symbol parameter value unit v cc dc supply voltage (referenced to gnd) ?0.5 to +7.0 v v in dc input voltage (referenced to gnd) ?0.5 to v cc + 0.5 v v out dc output voltage (referenced to gnd) ?0.5 to v cc + 0.5 v i in dc input current, per pin 20 ma i out dc output current, per pin 25 ma i cc dc supply current, v cc and gnd pins 50 ma p d power dissipation in still air soic package? 500 mw t stg storage temperature ? 65 to + 150 c t l lead temperature, 1 mm from case for 10 seconds 260 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. ?derating: soic package: ?7 mw/ c from 65 to 125 c recommended operating conditions symbol parameter min max unit v cc dc supply voltage (referenced to gnd) 4.5 5.5 v v in , v out dc input voltage, output voltage (referenced to gnd) 0 v cc v t a operating temperature, all package types ?55 +125 c t r , t f input rise and fall time (figure 1) 0 500 ns functional operation above the stresses listed in the recommended operating ranges is not implied. extended exposure to stresse s beyond the recommended operating ranges limits may affect device reliability. dc electrical characteristics (voltages referenced to gnd) symbo l parameter test conditions v cc v guaranteed limit unit ?55 to 25 c 85 c 125 c v ih minimum high?level input voltage v out = 0.1 v or v cc ? 0.1 v |i out | 20 a 4.5 5.5 2.0 2.0 2.0 2.0 2.0 2.0 v v il maximum low?level input voltage v out = 0.1 v or v cc ? 0.1 v |i out | 20 a 4.5 5.5 0.8 0.8 0.8 0.8 0.8 0.8 v v oh minimum high?level output voltage v in = v ih or v il |i out | 20 a 4.5 5.5 4.4 5.4 4.4 5.4 4.4 5.4 v v in = v ih or v il |i out | 4.0 ma 4.5 3.98 3.84 3.7 v ol maximum low?level output voltage v in = v ih or v il |i out | 20 a 4.5 5.5 0.1 0.1 0.1 0.1 0.1 0.1 v v in = v ih or v il |i out | 4.0 ma 4.5 0.26 0.33 0.4 i in maximum input leakage current v in = v cc or gnd 5.5 0.1 1.0 1.0 a i cc maximum quiescent supply current (per package) v in = v cc or gnd i out = 0 a 5.5 2.0 20 80 a i cc additional quiescent supply current v in = 2.4 v, any one input v in = v cc or gnd, other inputs l out = 0 a 5.5 ?55 c 25 c to 125 c ma 2.9 2.4 this device contains protection circuitry to guard against damage due to high static voltages or electric fields. however, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high?impedance circuit. for proper operation, v in and v out should be constrained to the range gnd (v in or v out ) v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). unused outputs must be left open.
MC74HCT74A http://onsemi.com 3 ac electrical characteristics (v cc = 5.0 v 10%, c l = 50 pf, input t r = t f = 6.0 ns) symbo l parameter guaranteed limit unit ?55 to 25 c 85 c 125 c f max maximum clock frequency (50% duty cycle) (figures 1 and 4) 30 24 20 mhz t plh , t phl maximum propagation delay, clock to q or q (figures 1 and 4) 24 30 36 ns t plh , t phl maximum propagation delay, set or reset to q or q (figures 2 and 4) 24 30 36 ns t tlh , t thl maximum output transition time, any output (figures 1 and 4) 15 19 22 ns c in maximum input capacitance 10 10 10 pf c pd power dissipation capacitance (per enabled output)* typical @ 25 c, v cc = 5.0 v pf 32 1. used to determine the no?load dynamic power consumption: p d = c pd v cc 2 f + i cc v cc . ????????????????????????????????? ????????????????????????????????? timing requirements (v cc = 5.0 v 10%, c l = 50 pf, input t r = t f = 6.0 ns) ???? ???? ???? ???? symbo l ??????????????? ??????????????? ??????????????? ??????????????? ??? ??? ??? ??? ???????????? ???????????? ??? ??? ??? ??? ???? ???? c ????? ????? 85 c ????? ????? 125 c ??? ??? ?? ?? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? t su ??????????????? ??????????????? ??? ??? ??? ??? ?? ?? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ??????????????? ??????????????? ??? ??? ??? ??? ?? ?? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ??????????????? ??????????????? ??? ??? ??? ??? ?? ?? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ??????????????? ??????????????? ??? ??? ??? ??? ?? ?? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ??????????????? ??????????????? ??? ??? ??? ??? ?? ?? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ??????????????? ??????????????? ??? ??? ??? ??? ?? ?? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ordering information device package shipping ? MC74HCT74Adg soic?14 nb (pb?free) 55 units / rail MC74HCT74Adr2g soic?14 nb (pb?free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
MC74HCT74A http://onsemi.com 4 switching waveforms 1/f max figure 1. clock q or q t f t r 3 v gnd 2.7 v 1.3 v 0.3 v 90% 1.3 v 10% t plh t phl t tlh t thl t w figure 2. gnd set or reset q or q q or q clock t plh t phl data clock figure 3. valid t su t h t rec t w figure 4. expanded logic diagram set data reset 4, 10 2, 12 1, 13 clock 3, 11 5, 9 6, 8 q q *includes all probe and jig capacitance c l * test point device under test output figure 5. 3 v gnd 3 v 1.3 v 1.3 v 1.3 v 1.3 v gnd 3 v gnd 3 v 1.3 v 1.3 v
MC74HCT74A http://onsemi.com 5 package dimensions soic?14 nb case 751a?03 issue k notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of at maximum material condition. 4. dimensions d and e do not include mold protrusions. 5. maximum mold protrusion 0.15 per side. h 14 8 7 1 m 0.25 b m c h x 45 seating plane a1 a m s a m 0.25 b s c b 13x b a e d e detail a l a3 detail a dim min max min max inches millimeters d 8.55 8.75 0.337 0.344 e 3.80 4.00 0.150 0.157 a 1.35 1.75 0.054 0.068 b 0.35 0.49 0.014 0.019 l 0.40 1.25 0.016 0.049 e 1.27 bsc 0.050 bsc a3 0.19 0.25 0.008 0.010 a1 0.10 0.25 0.004 0.010 m 0 7 0 7 h 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.019 6.50 14x 0.58 14x 1.18 1.27 dimensions: millimeters 1 pitch soldering footprint* *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 MC74HCT74A/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any product s herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any part icular purpose, nor does sci llc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner.
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